Re: [Qemu-devel] [PATCH v1 09/22] RISC-V: Include hexidecimal instruction in

2018-03-06 Thread Michael Clark
On Wed, Mar 7, 2018 at 12:09 PM, Philippe Mathieu-Daudé wrote: > On 03/06/2018 05:43 PM, Michael Clark wrote: > > This was added to help debug issues using -d in_asm. It is > > useful to see the instruction bytes, as one can detect if > > one is trying to execute ASCII or device-tree magic. > > c

Re: [Qemu-devel] [PATCH v1 09/22] RISC-V: Include hexidecimal instruction in

2018-03-06 Thread Philippe Mathieu-Daudé
On 03/06/2018 05:43 PM, Michael Clark wrote: > This was added to help debug issues using -d in_asm. It is > useful to see the instruction bytes, as one can detect if > one is trying to execute ASCII or device-tree magic. clean :) > > Signed-off-by: Michael Clark > Signed-off-by: Palmer Dabbelt

[Qemu-devel] [PATCH v1 09/22] RISC-V: Include hexidecimal instruction in

2018-03-06 Thread Michael Clark
This was added to help debug issues using -d in_asm. It is useful to see the instruction bytes, as one can detect if one is trying to execute ASCII or device-tree magic. Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- disas/riscv.c | 39 --- 1