Re: [Qemu-devel] [PATCH v1 05/10] target/ppc: update overflow flags for add/sub

2017-02-21 Thread Nikunj A Dadhania
Richard Henderson writes: > On 02/20/2017 09:11 PM, Nikunj A Dadhania wrote: >> tcg_temp_free(t0); >> +tcg_gen_extract_tl(cpu_ov32, cpu_ov, 31, 1); >> +tcg_gen_extract_tl(cpu_ov, cpu_ov, 63, 1); >> if (NARROW_MODE(ctx)) { >> -tcg_gen_ext32s_tl(cpu_ov, cpu_ov); >> +

Re: [Qemu-devel] [PATCH v1 05/10] target/ppc: update overflow flags for add/sub

2017-02-20 Thread Richard Henderson
On 02/20/2017 09:11 PM, Nikunj A Dadhania wrote: tcg_temp_free(t0); +tcg_gen_extract_tl(cpu_ov32, cpu_ov, 31, 1); +tcg_gen_extract_tl(cpu_ov, cpu_ov, 63, 1); if (NARROW_MODE(ctx)) { -tcg_gen_ext32s_tl(cpu_ov, cpu_ov); +tcg_gen_mov_tl(cpu_ov, cpu_ov32); } -

[Qemu-devel] [PATCH v1 05/10] target/ppc: update overflow flags for add/sub

2017-02-20 Thread Nikunj A Dadhania
* SO and OV reflects overflow of the 64-bit result in 64-bit mode and overflow of the low-order 32-bit result in 32-bit mode * OV32 reflects overflow of the low-order 32-bit independent of the mode Signed-off-by: Nikunj A Dadhania --- target/ppc/translate.c | 5 +++-- 1 file changed, 3 insert