On Wed, Jan 3, 2018 at 6:30 PM, Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 01/02/2018 04:44 PM, Michael Clark wrote:
> > +static const char *rv_ireg_name_sym[] = {
> > +"zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2",
> > +"s0", "s1", "a0", "a1", "a2
On 01/02/2018 04:44 PM, Michael Clark wrote:
> +static const char *rv_ireg_name_sym[] = {
> +"zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2",
> +"s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5",
> +"a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7",
>
The RISC-V disassembler has no dependencies outside of the 'disas'
directory so it can be applied independently. The majority of the
disassembler is machine-generated from instruction set metadata:
- https://github.com/michaeljclark/riscv-meta
Expected checkpatch errors for consistency and brevit
