Hi Antony,
As of v8 of the RISC-V QEMU target patch series, you can now define the
reset vector in your CPU initializer:
https://github.com/riscv/riscv-qemu/blob/qemu-upstream-v8/target/riscv/cpu.c#L110-L168
Michael.
On Fri, Jan 5, 2018 at 6:53 AM, Antony Pavlov
wrote:
> On Thu, 4 Jan 2018 20
FYI,
I've been working on the patch review comments in order of the patches and
am focusing on cleanup up the cpu and helpers.
OK [PATCH v1 0001/0021] RISC-V Maintainers
OK [PATCH v1 0002/0021] RISC-V ELF Machine Definition
INPROGRESS [PATCH v1 0003/0021] RISC-V CPU Core Definition
DONE [PATCH v1
On Fri, 5 Jan 2018 at 6:39 AM, Antony Pavlov
wrote:
> On Thu, 4 Jan 2018 20:33:57 +1300
> Michael Clark wrote:
>
> > On Thu, Jan 4, 2018 at 7:47 PM, Antony Pavlov
> > wrote:
> >
> > > On Wed, 3 Jan 2018 13:44:07 +1300
> > > Michael Clark wrote:
> > >
> > > > Add CPU state header, CPU definiti
On Thu, 4 Jan 2018 20:33:57 +1300
Michael Clark wrote:
> On Thu, Jan 4, 2018 at 7:47 PM, Antony Pavlov
> wrote:
>
> > On Wed, 3 Jan 2018 13:44:07 +1300
> > Michael Clark wrote:
> >
> > > Add CPU state header, CPU definitions and initialization routines
> > >
> > > Signed-off-by: Michael Clark
On Thu, Jan 4, 2018 at 7:47 PM, Antony Pavlov
wrote:
> On Wed, 3 Jan 2018 13:44:07 +1300
> Michael Clark wrote:
>
> > Add CPU state header, CPU definitions and initialization routines
> >
> > Signed-off-by: Michael Clark
> > ---
> > target/riscv/cpu.c | 338 ++
On Wed, 3 Jan 2018 13:44:07 +1300
Michael Clark wrote:
> Add CPU state header, CPU definitions and initialization routines
>
> Signed-off-by: Michael Clark
> ---
> target/riscv/cpu.c | 338 +++
> target/riscv/cpu.h | 363 ++
On Wed, Jan 3, 2018 at 6:21 PM, Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 01/02/2018 04:44 PM, Michael Clark wrote:
> > +#ifdef CONFIG_USER_ONLY
> > +static bool riscv_cpu_has_work(CPUState *cs)
> > +{
> > +return 0;
> > +}
> > +#else
> > +static bool riscv_cpu_has_work(CPU
On 01/02/2018 04:44 PM, Michael Clark wrote:
> +#ifdef CONFIG_USER_ONLY
> +static bool riscv_cpu_has_work(CPUState *cs)
> +{
> +return 0;
> +}
> +#else
> +static bool riscv_cpu_has_work(CPUState *cs)
> +{
> +return cs->interrupt_request & CPU_INTERRUPT_HARD;
> +}
> +#endif
There's no need
Add CPU state header, CPU definitions and initialization routines
Signed-off-by: Michael Clark
---
target/riscv/cpu.c | 338 +++
target/riscv/cpu.h | 363 ++
target/riscv/cpu_bits.h | 411 ++
