Hi Peter,
On Sat, Apr 6, 2013 at 4:59 AM, Peter Maydell wrote:
> On 3 April 2013 05:33, Peter Crosthwaite wrote:
>> The QSPI controller was using byte-wide stripes when striping across
>> the two flashes in dual parallel mode. The real hardware however uses
>> individual bit striping. QEMU misbe
On 3 April 2013 05:33, Peter Crosthwaite wrote:
> The QSPI controller was using byte-wide stripes when striping across
> the two flashes in dual parallel mode. The real hardware however uses
> individual bit striping. QEMU misbehaves in the (corner) case where
> data is written/read in dual-parall
The QSPI controller was using byte-wide stripes when striping across
the two flashes in dual parallel mode. The real hardware however uses
individual bit striping. QEMU misbehaves in the (corner) case where
data is written/read in dual-parallel mode and read/written back in
single mode.
Signed-off
