Re: [Qemu-devel] [PATCH RFC v1 1/3] target/ppc: Emulate LL/SC using cmpxchg helpers

2017-04-06 Thread Nikunj A Dadhania
David Gibson writes: > [ Unknown signature status ] > On Thu, Apr 06, 2017 at 03:52:47PM +0530, Nikunj A Dadhania wrote: >> Emulating LL/SC with cmpxchg is not correct, since it can suffer from >> the ABA problem. However, portable parallel code is written assuming >> only cmpxchg which means tha

Re: [Qemu-devel] [PATCH RFC v1 1/3] target/ppc: Emulate LL/SC using cmpxchg helpers

2017-04-06 Thread David Gibson
On Thu, Apr 06, 2017 at 03:52:47PM +0530, Nikunj A Dadhania wrote: > Emulating LL/SC with cmpxchg is not correct, since it can suffer from > the ABA problem. However, portable parallel code is written assuming > only cmpxchg which means that in practice this is a viable alternative. > > Signed-off

Re: [Qemu-devel] [PATCH RFC v1 1/3] target/ppc: Emulate LL/SC using cmpxchg helpers

2017-04-06 Thread Nikunj A Dadhania
Richard Henderson writes: > On 04/06/2017 03:22 AM, Nikunj A Dadhania wrote: >> tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so); >> l1 = gen_new_label(); >> tcg_gen_brcond_tl(TCG_COND_NE, EA, cpu_reserve, l1); >> -tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], CRF_EQ); >> -tcg_gen_qemu_s

Re: [Qemu-devel] [PATCH RFC v1 1/3] target/ppc: Emulate LL/SC using cmpxchg helpers

2017-04-06 Thread Nikunj A Dadhania
Richard Henderson writes: > On 04/06/2017 03:22 AM, Nikunj A Dadhania wrote: >> +TCGv_i32 tmp = tcg_temp_local_new_i32(); >> +TCGv t0; >> >> +tcg_gen_movi_i32(tmp, 0); >> tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so); >> l1 = gen_new_label(); >> tcg_gen_brcond_tl(TCG_COND_NE

Re: [Qemu-devel] [PATCH RFC v1 1/3] target/ppc: Emulate LL/SC using cmpxchg helpers

2017-04-06 Thread Richard Henderson
On 04/06/2017 03:22 AM, Nikunj A Dadhania wrote: tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so); l1 = gen_new_label(); tcg_gen_brcond_tl(TCG_COND_NE, EA, cpu_reserve, l1); -tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], CRF_EQ); -tcg_gen_qemu_st_tl(cpu_gpr[reg], EA, ctx->mem_idx, memop)

Re: [Qemu-devel] [PATCH RFC v1 1/3] target/ppc: Emulate LL/SC using cmpxchg helpers

2017-04-06 Thread Richard Henderson
On 04/06/2017 03:22 AM, Nikunj A Dadhania wrote: +TCGv_i32 tmp = tcg_temp_local_new_i32(); +TCGv t0; +tcg_gen_movi_i32(tmp, 0); tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so); l1 = gen_new_label(); tcg_gen_brcond_tl(TCG_COND_NE, EA, cpu_reserve, l1); -tcg_gen_ori_i32(cpu

[Qemu-devel] [PATCH RFC v1 1/3] target/ppc: Emulate LL/SC using cmpxchg helpers

2017-04-06 Thread Nikunj A Dadhania
Emulating LL/SC with cmpxchg is not correct, since it can suffer from the ABA problem. However, portable parallel code is written assuming only cmpxchg which means that in practice this is a viable alternative. Signed-off-by: Nikunj A Dadhania --- target/ppc/translate.c | 24