Benjamin Herrenschmidt writes:
> On Tue, 2016-09-06 at 10:23 +0530, Nikunj A Dadhania wrote:
>> >
>> > No there isn't. You can start qemu with --smp 4 and have 4 CPUs.
>>
>> That case was prevented to even start in case of TCG. That is why I had
>> to add "target-ppc: with MTTCG report more thre
On Tue, 2016-09-06 at 10:23 +0530, Nikunj A Dadhania wrote:
> >
> > No there isn't. You can start qemu with --smp 4 and have 4 CPUs.
>
> That case was prevented to even start in case of TCG. That is why I had
> to add "target-ppc: with MTTCG report more threads"
No, it works, you are confusing co
Benjamin Herrenschmidt writes:
> On Tue, 2016-09-06 at 07:25 +0530, Nikunj A Dadhania wrote:
>> > Benjamin Herrenschmidt writes:
>>
>> >
>> > On Sun, 2016-09-04 at 18:00 +0100, Alex Bennée wrote:
>> >
>> > >
>> > > When is the synchronisation point? On ARM we end the basic block on
>> > > sy
On Tue, 2016-09-06 at 07:25 +0530, Nikunj A Dadhania wrote:
> > Benjamin Herrenschmidt writes:
>
> >
> > On Sun, 2016-09-04 at 18:00 +0100, Alex Bennée wrote:
> >
> > >
> > > When is the synchronisation point? On ARM we end the basic block on
> > > system instructions that mess with the cache.
Benjamin Herrenschmidt writes:
> On Sun, 2016-09-04 at 18:00 +0100, Alex Bennée wrote:
>
>> When is the synchronisation point? On ARM we end the basic block on
>> system instructions that mess with the cache. As a result the flush
>> is done as soon as we exit the run loop on the next instruction
On Sun, 2016-09-04 at 18:00 +0100, Alex Bennée wrote:
> When is the synchronisation point? On ARM we end the basic block on
> system instructions that mess with the cache. As a result the flush
> is done as soon as we exit the run loop on the next instruction.
Talking o this... Nikunj, I notice,
On Sun, 2016-09-04 at 18:00 +0100, Alex Bennée wrote:
> >
> > > We must provide a guarantee that no other processor can see the old
> > > translation when the tlb invalidation sequence completes. With the
> > > current lazy TLB flush, we already delay the invalidation until
> > > we hit that synch
Nikunj A Dadhania writes:
> Benjamin Herrenschmidt writes:
>
>> On Fri, 2016-09-02 at 12:02 +0530, Nikunj A Dadhania wrote:
>>> Signed-off-by: Nikunj A Dadhania
>>> ---
>>> cputlb.c| 15 +++
>>> include/exec/exec-all.h |2 ++
>>> target-ppc/mmu-hash64.c |2 +-
>>> 3 files changed, 18
Benjamin Herrenschmidt writes:
> On Fri, 2016-09-02 at 12:02 +0530, Nikunj A Dadhania wrote:
>> Signed-off-by: Nikunj A Dadhania
>> ---
>> cputlb.c| 15 +++
>> include/exec/exec-all.h | 2 ++
>> target-ppc/mmu-hash64.c | 2 +-
>> 3 files changed, 18 insertions(+),
On Fri, 2016-09-02 at 12:02 +0530, Nikunj A Dadhania wrote:
> Signed-off-by: Nikunj A Dadhania
> ---
> cputlb.c| 15 +++
> include/exec/exec-all.h | 2 ++
> target-ppc/mmu-hash64.c | 2 +-
> 3 files changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/cputlb.c
Signed-off-by: Nikunj A Dadhania
---
cputlb.c| 15 +++
include/exec/exec-all.h | 2 ++
target-ppc/mmu-hash64.c | 2 +-
3 files changed, 18 insertions(+), 1 deletion(-)
diff --git a/cputlb.c b/cputlb.c
index 64faf47..17ff58e 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -1
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