Re: [Qemu-devel] [PATCH 9/9] target/arm: Implement SG instruction corner cases

2017-10-10 Thread Richard Henderson
On 10/09/2017 06:48 AM, Peter Maydell wrote: > The common situation of the SG instruction is that it is > executed from S&NSC memory by a CPU in NS state. That case > is handled by v7m_handle_execute_nsc(). However the instruction > also has defined behaviour in a couple of other cases: > * SG ins

[Qemu-devel] [PATCH 9/9] target/arm: Implement SG instruction corner cases

2017-10-09 Thread Peter Maydell
The common situation of the SG instruction is that it is executed from S&NSC memory by a CPU in NS state. That case is handled by v7m_handle_execute_nsc(). However the instruction also has defined behaviour in a couple of other cases: * SG instruction in NS memory (behaves as a NOP) * SG in S mem