On 8 May 2016 at 10:07, Laurent Vivier wrote:
> But I didn't really care here of the page faults because m68k only
> supports non privileged instructions: coldfire is used in semi-hosting
> mode (no MMU) and 680x0-like machine has no hardware (I use it in
> linux-user mode).
It does still affect
Le 07/05/2016 à 23:50, Peter Maydell a écrit :
> On 7 May 2016 at 20:01, Laurent Vivier wrote:
>>
>>
>> Le 07/05/2016 à 00:00, Richard Henderson a écrit :
>>> On 05/04/2016 11:21 AM, Laurent Vivier wrote:
+reg = AREG(insn, 0);
+src = gen_load(s, opsize, reg, 1);
+tcg_g
On 7 May 2016 at 20:01, Laurent Vivier wrote:
>
>
> Le 07/05/2016 à 00:00, Richard Henderson a écrit :
>> On 05/04/2016 11:21 AM, Laurent Vivier wrote:
>>> +reg = AREG(insn, 0);
>>> +src = gen_load(s, opsize, reg, 1);
>>> +tcg_gen_addi_i32(reg, reg, opsize_bytes(opsize));
>>> +
>>> +
Le 07/05/2016 à 00:00, Richard Henderson a écrit :
> On 05/04/2016 11:21 AM, Laurent Vivier wrote:
>> +reg = AREG(insn, 0);
>> +src = gen_load(s, opsize, reg, 1);
>> +tcg_gen_addi_i32(reg, reg, opsize_bytes(opsize));
>> +
>> +reg = AREG(insn, 9);
>> +dest = gen_load(s, opsize,
On 05/04/2016 11:21 AM, Laurent Vivier wrote:
+reg = AREG(insn, 0);
+src = gen_load(s, opsize, reg, 1);
+tcg_gen_addi_i32(reg, reg, opsize_bytes(opsize));
+
+reg = AREG(insn, 9);
+dest = gen_load(s, opsize, reg, 1);
+tcg_gen_addi_i32(reg, reg, opsize_bytes(opsize));
Dela
Signed-off-by: Laurent Vivier
---
target-m68k/translate.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 029c166..2d92bdd 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -2758,6 +2758,26 @@ D
