Re: [Qemu-devel] [PATCH 5/6] target-arm: A64: Implement PMULL instruction

2014-02-17 Thread Peter Maydell
On 17 February 2014 16:29, Richard Henderson wrote: > On 02/16/2014 12:21 PM, Peter Maydell wrote: >> +/* Helper function for 64 bit polynomial multiply case: >> + * perform PolynomialMult(op1, op2) and return either the top or >> + * bottom half of the 128 bit result. >> + */ >> +uint64_t HELPER(

Re: [Qemu-devel] [PATCH 5/6] target-arm: A64: Implement PMULL instruction

2014-02-17 Thread Richard Henderson
On 02/16/2014 12:21 PM, Peter Maydell wrote: > +/* Helper function for 64 bit polynomial multiply case: > + * perform PolynomialMult(op1, op2) and return either the top or > + * bottom half of the 128 bit result. > + */ > +uint64_t HELPER(neon_pmull_64_lo)(CPUARMState *env, uint64_t op1, uint64_t

[Qemu-devel] [PATCH 5/6] target-arm: A64: Implement PMULL instruction

2014-02-16 Thread Peter Maydell
Implement the PMULL instruction; this is the last unimplemented insn in the three-reg-diff group. Note that PMULL with size 3 is considered part of the AES part of the crypto extensions (see the ID_AA64ISAR0_EL1 register definition in the v8 ARM ARM), so it isn't necessary to burn an extra feature