On 06/29/2018 01:40 AM, Peter Maydell wrote:
>> cpu->id_isar5 = 0x;
>> +cpu->id_isar6 = 0x;
...
>> cpu->id_isar5 = 0x;
>> +cpu->id_isar6 = 0x;
...
>> cpu->id_isar5 = 0x;
>> +cpu->id_isar6 = 0x;
...
>> cpu->id_isar5 = 0x
On 29 June 2018 at 01:15, Richard Henderson
wrote:
> This register was added to aa32 state by ARMv8.2.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/cpu.h| 1 +
> target/arm/cpu.c| 4
> target/arm/cpu64.c | 2 ++
> target/arm/helper.c | 5 ++---
> 4 files changed, 9 inser
On 06/28/2018 05:57 PM, Philippe Mathieu-Daudé wrote:
>> @@ -4851,11 +4851,10 @@ void register_cp_regs_for_features(ARMCPU *cpu)
>>.opc0 = 3, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 6,
>>.access = PL1_R, .type = ARM_CP_CONST,
>>.resetvalue = cpu->id_mm
On 06/28/2018 09:57 PM, Philippe Mathieu-Daudé wrote:
> Hi Richard,
>
> On 06/28/2018 09:15 PM, Richard Henderson wrote:
>> This register was added to aa32 state by ARMv8.2.
>>
>> Signed-off-by: Richard Henderson
>> ---
>> target/arm/cpu.h| 1 +
>> target/arm/cpu.c| 4
>> target/arm
Hi Richard,
On 06/28/2018 09:15 PM, Richard Henderson wrote:
> This register was added to aa32 state by ARMv8.2.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/cpu.h| 1 +
> target/arm/cpu.c| 4
> target/arm/cpu64.c | 2 ++
> target/arm/helper.c | 5 ++---
> 4 files chang
This register was added to aa32 state by ARMv8.2.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h| 1 +
target/arm/cpu.c| 4
target/arm/cpu64.c | 2 ++
target/arm/helper.c | 5 ++---
4 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/
