On Fri, Jan 16, 2015 at 07:02:55PM +, Peter Maydell wrote:
> On 16 January 2015 at 16:16, Peter Maydell wrote:
> > I think we're very soon going to need to bite the bullet and
> > make this code have a concept of the current "translation
> > regime", as the ARM ARM terms it...
>
> In fact I t
On Fri, Jan 16, 2015 at 04:16:02PM +, Peter Maydell wrote:
> On 13 January 2015 at 15:48, Andrew Jones wrote:
> > Cleanup XN/PXN handling in get_phys_addr_lpae, and implement all but
> > EL2 support of the following ARMv8 sections
> >
> > D4.5.1 Memory access control: Access permissions for
On 16 January 2015 at 16:16, Peter Maydell wrote:
> I think we're very soon going to need to bite the bullet and
> make this code have a concept of the current "translation
> regime", as the ARM ARM terms it...
In fact I think we need to do it now. I'll try to
write some code to at least get a co
On 13 January 2015 at 15:48, Andrew Jones wrote:
> Cleanup XN/PXN handling in get_phys_addr_lpae, and implement all but
> EL2 support of the following ARMv8 sections
>
> D4.5.1 Memory access control: Access permissions for instruction
> execution
> G4.7.2 Execute-never restrictions on
Cleanup XN/PXN handling in get_phys_addr_lpae, and implement all but
EL2 support of the following ARMv8 sections
D4.5.1 Memory access control: Access permissions for instruction
execution
G4.7.2 Execute-never restrictions on instruction fetching
G4.7.2 matches the ARMv7 section B3.7.
