On Mon, May 20, 2013 at 02:44:25PM -0600, Bjorn Helgaas wrote:
> On Mon, May 20, 2013 at 12:32 PM, Michael S. Tsirkin wrote:
> > On Mon, May 20, 2013 at 11:09:56AM -0600, Bjorn Helgaas wrote:
> >> Indicate ASPM L0s and L1 support in Link Capabilities and make the ASPM
> >> bits in Link Control wri
On Mon, May 20, 2013 at 12:32 PM, Michael S. Tsirkin wrote:
> On Mon, May 20, 2013 at 11:09:56AM -0600, Bjorn Helgaas wrote:
>> Indicate ASPM L0s and L1 support in Link Capabilities and make the ASPM
>> bits in Link Control writable. These Link Control bits don't do anything
>> in qemu, but havin
On Mon, May 20, 2013 at 11:09:56AM -0600, Bjorn Helgaas wrote:
> Indicate ASPM L0s and L1 support in Link Capabilities and make the ASPM
> bits in Link Control writable. These Link Control bits don't do anything
> in qemu, but having them writable means the BIOS or OS can write them as
> on real h
Indicate ASPM L0s and L1 support in Link Capabilities and make the ASPM
bits in Link Control writable. These Link Control bits don't do anything
in qemu, but having them writable means the BIOS or OS can write them as
on real hardware.
Signed-off-by: Bjorn Helgaas
---
hw/pci/pcie.c
