On 06/11/2013 04:19 AM, Anton Blanchard wrote:
> The rldcl instruction doesn't have an sh field, so the minor opcode
> is shifted 1 bit. We were using the XO30 macro which shifted the
> minor opcode 2 bits.
>
> Remove XO30 and add MD30 and MDS30 macros which match the
> Power ISA categories.
>
>
Hi Richard,
> But that suggests then that we ought not be using XO30.
> Or at least adding a comment.
Good idea, how does this look?
Anton
--
The rldcl instruction doesn't have an sh field, so the minor opcode
is shifted 1 bit. We were using the XO30 macro which shifted the
minor opcode 2 bits
On 06/02/2013 05:27 AM, Anton Blanchard wrote:
> The rldcl instruction doesn't have an sh field, so the minor opcode
> of 8 is actually 4 when using the XO30 macro.
>
> Cc: qemu-sta...@nongnu.org
> Signed-off-by: Anton Blanchard
> ---
>
> Index: b/tcg/ppc64/tcg-target.c
> ===
The rldcl instruction doesn't have an sh field, so the minor opcode
of 8 is actually 4 when using the XO30 macro.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Anton Blanchard
---
Index: b/tcg/ppc64/tcg-target.c
===
--- a/tcg/ppc64/tcg
