Hi,
On 4/10/11, Marek Vasut wrote:
> On Monday 04 April 2011 15:38:44 Dmitry Eremin-Solenikov wrote:
>> Currently target-arm/ assumes at least ARMv5 core. Add support for
>> handling also ARMv4/ARMv4T. This changes the following instructions:
>>
>> BX(v4T and later)
>>
>> BKPT, BLX, CDP2, CLZ, LD
On Monday 04 April 2011 15:38:44 Dmitry Eremin-Solenikov wrote:
> Currently target-arm/ assumes at least ARMv5 core. Add support for
> handling also ARMv4/ARMv4T. This changes the following instructions:
>
> BX(v4T and later)
>
> BKPT, BLX, CDP2, CLZ, LDC2, LDRD, MCRR, MCRR2, MRRC, MCRR, MRC2, MR
On Mon, Apr 04, 2011 at 05:38:44PM +0400, Dmitry Eremin-Solenikov wrote:
> Currently target-arm/ assumes at least ARMv5 core. Add support for
> handling also ARMv4/ARMv4T. This changes the following instructions:
>
> BX(v4T and later)
>
> BKPT, BLX, CDP2, CLZ, LDC2, LDRD, MCRR, MCRR2, MRRC, MCRR,
On 6 April 2011 18:41, Dmitry Eremin-Solenikov wrote:
> On 4/6/11, Peter Maydell wrote:
>> On 4 April 2011 14:38, Dmitry Eremin-Solenikov wrote:
>>> Currently target-arm/ assumes at least ARMv5 core. Add support for
>>> handling also ARMv4/ARMv4T. This changes the following instructions:
>>
>>>
On 4/6/11, Peter Maydell wrote:
> On 4 April 2011 14:38, Dmitry Eremin-Solenikov wrote:
>> Currently target-arm/ assumes at least ARMv5 core. Add support for
>> handling also ARMv4/ARMv4T. This changes the following instructions:
>
>> Signed-off-by: Dmitry Eremin-Solenikov
>
> Reviewed-by: Peter
On 4 April 2011 14:38, Dmitry Eremin-Solenikov wrote:
> Currently target-arm/ assumes at least ARMv5 core. Add support for
> handling also ARMv4/ARMv4T. This changes the following instructions:
> Signed-off-by: Dmitry Eremin-Solenikov
Reviewed-by: Peter Maydell
-- PMM
Currently target-arm/ assumes at least ARMv5 core. Add support for
handling also ARMv4/ARMv4T. This changes the following instructions:
BX(v4T and later)
BKPT, BLX, CDP2, CLZ, LDC2, LDRD, MCRR, MCRR2, MRRC, MCRR, MRC2, MRRC,
MRRC2, PLD QADD, QDADD, QDSUB, QSUB, STRD, SMLAxy, SMLALxy, SMLAWxy,
SMU
Currently target-arm/ assumes at least ARMv5 core. Add support for
handling also ARMv4/ARMv4T. This changes the following instructions:
BX(v4T and later)
BKPT, BLX, CDP2, CLZ, LDC2, LDRD, MCRR, MCRR2, MRRC, MCRR, MRC2, MRRC,
MRRC2, PLD QADD, QDADD, QDSUB, QSUB, STRD, SMLAxy, SMLALxy, SMLAWxy,
SMU
On 2 April 2011 16:25, Dmitry Eremin-Solenikov wrote:
> On 3/31/11, Dmitry Eremin-Solenikov wrote:
>> Yeah, it seems so :)
>> Please commit the fixed patch.
>
> Do I need to send the fixed patchset?
I think that would probably be best.
-- PMM
On 3/31/11, Dmitry Eremin-Solenikov wrote:
> On 3/30/11, Peter Maydell wrote:
>> On 30 March 2011 12:41, Dmitry Eremin-Solenikov
>> wrote:
>>> @@ -7172,10 +7210,7 @@ static void disas_arm_insn(CPUState * env,
>>> DisasContext *s)
>>> }
>>> if (insn & (1 << 20)) {
>>>
On 3/30/11, Peter Maydell wrote:
> On 30 March 2011 12:41, Dmitry Eremin-Solenikov
> wrote:
>> @@ -7172,10 +7210,7 @@ static void disas_arm_insn(CPUState * env,
>> DisasContext *s)
>> }
>> if (insn & (1 << 20)) {
>> /* Complete the load. */
>> -
On 30 March 2011 12:41, Dmitry Eremin-Solenikov wrote:
> @@ -7172,10 +7210,7 @@ static void disas_arm_insn(CPUState * env,
> DisasContext *s)
> }
> if (insn & (1 << 20)) {
> /* Complete the load. */
> - if (rd == 15)
> - g
Currently target-arm/ assumes at least ARMv5 core. Add support for
handling also ARMv4/ARMv4T. This changes the following instructions:
BX(v4T and later)
BKPT, BLX, CDP2, CLZ, LDC2, LDRD, MCRR, MCRR2, MRRC, MCRR, MRC2, MRRC,
MRRC2, PLD QADD, QDADD, QDSUB, QSUB, STRD, SMLAxy, SMLALxy, SMLAWxy,
SMU
On 29 March 2011 17:58, Dmitry Eremin-Solenikov wrote:
Looks good, nearly there I think.
> @@ -7172,10 +7191,11 @@ static void disas_arm_insn(CPUState * env,
> DisasContext *s)
> }
> if (insn & (1 << 20)) {
> /* Complete the load. */
> - i
Currently target-arm/ assumes at least ARMv5 core. Add support for
handling also ARMv4/ARMv4T. This changes the following instructions:
BX(v4T and later)
BKPT, BLX, CDP2, CLZ, LDC2, LDRD, MCRR, MCRR2, MRRC, MCRR, MRC2, MRRC,
MRRC2, PLD QADD, QDADD, QDSUB, QSUB, STRD, SMLAxy, SMLALxy, SMLAWxy,
SMU
Hello,
On 3/27/11, Peter Maydell wrote:
> I've just gone through this distinguishing v5 sublevels.
> I've also gone back and looked up an older ARM ARM for any v5 vs
> v5T differences, and it looks like the only difference really is
> whether Thumb mode works: the ARM instruction set is exactly t
I've just gone through this distinguishing v5 sublevels.
I've also gone back and looked up an older ARM ARM for any v5 vs
v5T differences, and it looks like the only difference really is
whether Thumb mode works: the ARM instruction set is exactly the
same including the existence of BX/BLX.
So I'm
On 3/26/11, Peter Maydell wrote:
> On 26 March 2011 17:23, Dmitry Eremin-Solenikov
> wrote:
>> Can we assume (maybe temporarily) that all v5 are also v5TE?
>> It seems it's currently done so, and I don't want to be too intrusive.
>
> All the cores we currently model that are v5 are v5TE, I think.
On 26 March 2011 17:23, Dmitry Eremin-Solenikov wrote:
> Can we assume (maybe temporarily) that all v5 are also v5TE?
> It seems it's currently done so, and I don't want to be too intrusive.
All the cores we currently model that are v5 are v5TE, I think.
The current (v7) ARM ARM says the valid v5
On 3/25/11, Peter Maydell wrote:
> On 24 March 2011 22:07, Dmitry Eremin-Solenikov
> wrote:
>> Currently target-arm/ assumes at least ARMv5 core. Add support for
>> handling also ARMv4/ARMv4T. This changes the following instructions:
>
> Mostly looks good; comments below.
>
>> @@ -161,6 +179,8 @@
On 24 March 2011 22:07, Dmitry Eremin-Solenikov wrote:
> Currently target-arm/ assumes at least ARMv5 core. Add support for
> handling also ARMv4/ARMv4T. This changes the following instructions:
Mostly looks good; comments below.
> @@ -161,6 +179,8 @@ static void cpu_reset_model_id(CPUARMState *
Currently target-arm/ assumes at least ARMv5 core. Add support for
handling also ARMv4/ARMv4T. This changes the following instructions:
BX(v4T and later)
BKPT, BLX, CDP2, CLZ, LDC2, LDRD, MCRR, MCRR2, MRRC, MCRR, MRC2, MRRC,
MRRC2, PLD QADD, QDADD, QDSUB, QSUB, STRD, SMLAxy, SMLALxy, SMLAWxy,
SMU
Currently target-arm/ assumes at least ARMv5 core. Add support for
handling also ARMv4/ARMv4T. This changes the following instructions:
BX(v4T and later)
BKPT, BLX, CDP2, CLZ, LDC2, LDRD, MCRR, MCRR2, MRRC, MCRR, MRC2, MRRC,
MRRC2, PLD QADD, QDADD, QDSUB, QSUB, STRD, SMLAxy, SMLALxy, SMLAWxy,
SMU
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