On 06/20/2018 05:05 AM, Yongbok Kim wrote:
> case NM_P48I:
> +insn = cpu_lduw_code(env, ctx->base.pc_next + 4);
Surely split this case out to a new function. And properly form the common,
signed 32-bit offset once before the switch.
> +switch ((ctx->opcode >> 16) & 0x1f) {
>
Add nanoMIPS 48bit instructions
Signed-off-by: Yongbok Kim
---
target/mips/translate.c | 66 +
1 file changed, 66 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index c9b46dd..f3a8845 100644
--- a/target/mips/translat
