On 02/10/2016 12:28 AM, Paolo Bonzini wrote:
On 09/07/2015 10:17, Richard Henderson wrote:
+/* Disallow enabling only half of MPX. */
+if ((mask ^ (mask * (XSTATE_BNDCSR / XSTATE_BNDREGS))) & XSTATE_BNDCSR) {
I'm refreshing patches 1-4 to add PKE support, and this caught my eye...
Wh
On 02/09/2016 06:28 AM, Paolo Bonzini wrote:
> On 09/07/2015 10:17, Richard Henderson wrote:
>> +/* Disallow enabling only half of MPX. */
>> +if ((mask ^ (mask * (XSTATE_BNDCSR / XSTATE_BNDREGS))) & XSTATE_BNDCSR)
>> {
>
> I'm refreshing patches 1-4 to add PKE support, and this caught m
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
On 09/02/2016 16:50, Eric Blake wrote:
>>> What about just
>>>
>>> if (!!(mask & XSTATE_BNDCSR) != !!(mask & XSTATE_BNDREGS))
> Or even:
>
> if (!(mask & XSTATE_BNDCSR) != !(mask & XSTATE_BNDREGS))
>
This is more mysterious. :)
Paolo
-BEGI
On 09/07/2015 10:17, Richard Henderson wrote:
> +/* Disallow enabling only half of MPX. */
> +if ((mask ^ (mask * (XSTATE_BNDCSR / XSTATE_BNDREGS))) & XSTATE_BNDCSR) {
I'm refreshing patches 1-4 to add PKE support, and this caught my eye...
What about just
if (!!(mask & XSTATE_B
On 07/09/2015 02:18 PM, Paolo Bonzini wrote:
On 09/07/2015 10:17, Richard Henderson wrote:
+void cpu_sync_bndcs_hf(CPUX86State *env)
s/hf/hflags/ :)
Heh. Done.
Why aren't you just using a goto, like
if (ret < 0) {
goto out;
}
ret = 0;
out:
cpu_sync_bndcs_h
On 09/07/2015 10:17, Richard Henderson wrote:
>
> +void cpu_sync_bndcs_hf(CPUX86State *env)
s/hf/hflags/ :)
> +{
> +uint32_t hflags = env->hflags;
> +uint32_t bndcsr;
> +
> +if ((hflags & HF_CPL_MASK) == 3) {
> +bndcsr = env->bndcs_regs.cfgu;
> +} else {
> +bndc
On 09/07/2015 10:17, Richard Henderson wrote:
> +/* ??? Vol 1, 16.5.6 Intel MPX and SMM says that IA32_BNDCFGS
> + is saved at offset 7ED0. Vol 3, 34.4.1.1, Table 32-2, has
> + 7EA0-7ED7 as "reserved". What's this, and what's really
> + supposed to happen? */
> x86_s
Enable and disable at CPL changes, MSR changes, and XRSTOR changes.
Signed-off-by: Richard Henderson
---
target-i386/Makefile.objs | 2 +-
target-i386/cpu.c | 18 +--
target-i386/cpu.h | 21 -
target-i386/fpu_helper.c | 78 +++
