On 8/7/19 11:16 AM, Peter Maydell wrote:
> How about we add this to the commit message?
>
> This changes the behaviour for load_reg() and load_reg_var()
> when called with reg==15 from a 32-bit Thumb instruction:
> previously they would have returned the incorrect value
> of pc_curr + 6, and now t
On Wed, 7 Aug 2019 at 19:04, Richard Henderson
wrote:
>
> On 8/7/19 10:27 AM, Peter Maydell wrote:
> >> +/* The architectural value of PC. */
> >> +static uint32_t read_pc(DisasContext *s)
> >> +{
> >> +return s->pc_curr + (s->thumb ? 4 : 8);
> >> +}
> >> +
> >> /* Set a variable to the valu
On 8/7/19 10:27 AM, Peter Maydell wrote:
>> +/* The architectural value of PC. */
>> +static uint32_t read_pc(DisasContext *s)
>> +{
>> +return s->pc_curr + (s->thumb ? 4 : 8);
>> +}
>> +
>> /* Set a variable to the value of a CPU register. */
>> static void load_reg_var(DisasContext *s, TC
On Wed, 7 Aug 2019 at 05:53, Richard Henderson
wrote:
>
> We currently have 3 different ways of computing the architectural
> value of "PC" as seen in the ARM ARM.
>
> The value of s->pc has been incremented past the current insn,
> but that is all. Thus for a32, PC = s->pc + 4; for t32, PC = s->
We currently have 3 different ways of computing the architectural
value of "PC" as seen in the ARM ARM.
The value of s->pc has been incremented past the current insn,
but that is all. Thus for a32, PC = s->pc + 4; for t32, PC = s->pc;
for t16, PC = s->pc + 2. These differing computations make it
