Re: [Qemu-devel] [PATCH 01/10] target-i386: SSE4.1: fix pinsrb instruction

2013-03-27 Thread Richard Henderson
On 03/26/2013 12:01 PM, Aurelien Jarno wrote: > gen_op_mov_TN_reg() loads the value in cpu_T[0], so this temporary should > be used instead of cpu_tmp0. > > Signed-off-by: Aurelien Jarno > --- > target-i386/translate.c |4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by:

[Qemu-devel] [PATCH 01/10] target-i386: SSE4.1: fix pinsrb instruction

2013-03-26 Thread Aurelien Jarno
gen_op_mov_TN_reg() loads the value in cpu_T[0], so this temporary should be used instead of cpu_tmp0. Signed-off-by: Aurelien Jarno --- target-i386/translate.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 7239