On 22 June 2018 at 16:16, Philippe Mathieu-Daudé wrote:
> On 06/22/2018 11:39 AM, Aleksandar Markovic wrote:
>> If nobody objects, while integrating/applying, I am going to change all
>> instances of "@imgtec.com" to "@mips.com" for this series.
>>
>> Some of the patches might have been developed
ul Burton; Stefan
>> Markovic; Matthew Fortune; aurel...@aurel32.net; Paul Burton
>> Subject: Re: [Qemu-devel] [PATCH 00/35] nanoMIPS
>>
>> Hi Yongbok,
>>
>> On 06/20/2018 09:05 AM, Yongbok Kim wrote:
>>> This series of patches is implementing recently anno
t; Subject: Re: [Qemu-devel] [PATCH 00/35] nanoMIPS
>
> Hi Yongbok,
>
> On 06/20/2018 09:05 AM, Yongbok Kim wrote:
> > This series of patches is implementing recently announced nanoMIPS on QEMU.
> > nanoMIPS is a variable length ISA containing 16, 32 and 48 bit wide
>
Thanks!
I gave "reviewed-by" to five patches (01, 02, 13, 22, and 33) that actually fix
or improve pre-nanoMIPS code segments (all these issues exist regardless of
nanoMIPS support). I am going to integrate them via pull request next week
separately, before the whole nanoMIPS series. Apart fro
Hi Yongbok,
On 06/20/2018 09:05 AM, Yongbok Kim wrote:
> This series of patches is implementing recently announced nanoMIPS on QEMU.
> nanoMIPS is a variable length ISA containing 16, 32 and 48 bit wide
> instructions. It is designed to be portable at assembly level with other MIPS
> and microMIP
This series of patches is implementing recently announced nanoMIPS on QEMU.
nanoMIPS is a variable length ISA containing 16, 32 and 48 bit wide
instructions. It is designed to be portable at assembly level with other MIPS
and microMIPS code, but contains a number of changes which enhance code dens
