Re: [Qemu-devel] [PATCH 0/5] mps2: Implement FPGAIO counters and dual-timer

2018-08-16 Thread Peter Maydell
Ping? Patch 2 has been reviewed but the rest are still waiting. thanks -- PMM On 30 July 2018 at 17:24, Peter Maydell wrote: > This patchset adds some missing timer and counter devices > to the MPS2 boards: > > * the MPS2 "fpgaio" register bank includes some registers >which provide various

Re: [Qemu-devel] [PATCH 0/5] mps2: Implement FPGAIO counters and dual-timer

2018-07-30 Thread no-reply
Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20180730162458.23186-1-peter.mayd...@linaro.org Subject: [Qemu-devel] [PATCH 0/5] mps2: Implement FPGAIO counters and dual-timer === TEST SCRIPT BEGIN === #!/bin/bash BASE

Re: [Qemu-devel] [PATCH 0/5] mps2: Implement FPGAIO counters and dual-timer

2018-07-30 Thread no-reply
Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20180730162458.23186-1-peter.mayd...@linaro.org Subject: [Qemu-devel] [PATCH 0/5] mps2: Implement FPGAIO counters and dual-timer === TEST SCRIPT BEGIN === #!/bin/bash BASE

[Qemu-devel] [PATCH 0/5] mps2: Implement FPGAIO counters and dual-timer

2018-07-30 Thread Peter Maydell
This patchset adds some missing timer and counter devices to the MPS2 boards: * the MPS2 "fpgaio" register bank includes some registers which provide various kinds of free-running counter * the boards have an instance fo the CMSDK "dual timer module" Together these are sufficient for QEMU's