On 17/01/2008, Alexander Graf <[EMAIL PROTECTED]> wrote:
> TeLeMan wrote:
> > env->cr[8] used by SVM codes was not defined.
>
> As far as I remember cr8 is the very same as the TPR, so we only need to
> implement one and map the other to the value we want.
I committed the original patch to avoid p
On Thu, Jan 17, 2008 at 05:13:31PM +0100, Alexander Graf wrote:
> Their only difference is, that the TPR is implemented as an MSR, whereas
> the CR8 is a CPU register.
The TPR is currently a memory mapped local Apic register. The
default address is 0xfee00080, according to Intel vol3a chapter 8..
On Jan 17, 2008, at 4:57 PM, Robert William Fuller wrote:
Alexander Graf wrote:
TeLeMan wrote:
env->cr[8] used by SVM codes was not defined.
As far as I remember cr8 is the very same as the TPR, so we only
need to
implement one and map the other to the value we want.
My approach was to use
Alexander Graf wrote:
TeLeMan wrote:
env->cr[8] used by SVM codes was not defined.
As far as I remember cr8 is the very same as the TPR, so we only need to
implement one and map the other to the value we want.
My approach was to use the TPR and route the cr8 accesses to the tpr.
Even though I h
TeLeMan wrote:
> env->cr[8] used by SVM codes was not defined.
>
>
As far as I remember cr8 is the very same as the TPR, so we only need to
implement one and map the other to the value we want.
My approach was to use the TPR and route the cr8 accesses to the tpr.
Even though I have to admit tha
env->cr[8] used by SVM codes was not defined.
http://www.nabble.com/file/p14921864/svm_cr8.patch svm_cr8.patch:
diff -p -u qemu.orig/target-i386/cpu.h qemu/target-i386/cpu.h
--- qemu.orig/target-i386/cpu.h Mon Jan 14 11:11:08 2008
+++ qemu/target-i386/cpu.h Thu Jan 17 23:21:22 2008
@@ -493
