On 20 November 2015 at 17:12, John Snow wrote:
> This looks correct. This will definitely fix the race in the test, since
> it was due to a race where we were reading the data when DRQ was not set.
>
> Where I still remain a little confused is the precise flow control that
> leads to sending an i
On 11/20/2015 09:29 AM, Peter Lieven wrote:
> The check for the cleared BSY flag has to be performed
> before each data transfer and not just before the
> first one.
>
> Commit 5f81724d revealed this glitch as the BSY flag
> was not set in ATAPI PIO transfers before.
>
> While at it fix the des
Am 20.11.2015 um 15:29 hat Peter Lieven geschrieben:
> The check for the cleared BSY flag has to be performed
> before each data transfer and not just before the
> first one.
>
> Commit 5f81724d revealed this glitch as the BSY flag
> was not set in ATAPI PIO transfers before.
>
> While at it fix
On 11/20/2015 09:37 AM, Peter Maydell wrote:
> On 20 November 2015 at 14:29, Peter Lieven wrote:
>> The check for the cleared BSY flag has to be performed
>> before each data transfer and not just before the
>> first one.
>>
>> Commit 5f81724d revealed this glitch as the BSY flag
>> was not set
On 20 November 2015 at 14:29, Peter Lieven wrote:
> The check for the cleared BSY flag has to be performed
> before each data transfer and not just before the
> first one.
>
> Commit 5f81724d revealed this glitch as the BSY flag
> was not set in ATAPI PIO transfers before.
>
> While at it fix the
The check for the cleared BSY flag has to be performed
before each data transfer and not just before the
first one.
Commit 5f81724d revealed this glitch as the BSY flag
was not set in ATAPI PIO transfers before.
While at it fix the desciptions and add a comment before
the nested for loop that tra
