Re: [Qemu-devel] [PATCH] target-ppc: fix RFI by clearing some bits of MSR

2010-05-31 Thread Aurelien Jarno
On Fri, May 28, 2010 at 09:07:32PM +0200, Thomas Monjalon wrote: > From: Thomas Monjalon > > Since commit 2ada0ed, "Return From Interrupt" is broken for PPC processors > because some interrupt specifics bits of SRR1 are copied to MSR. > > SRR1 is a save of MSR during interrupt. > During RFI, MSR

[Qemu-devel] [PATCH] target-ppc: fix RFI by clearing some bits of MSR

2010-05-28 Thread Thomas Monjalon
From: Thomas Monjalon Since commit 2ada0ed, "Return From Interrupt" is broken for PPC processors because some interrupt specifics bits of SRR1 are copied to MSR. SRR1 is a save of MSR during interrupt. During RFI, MSR must be restored from SRR1. But some bits of SRR1 are interrupt-specific and a