Re: [Qemu-devel] [PATCH] target-ppc: clear MSR_POW on interrupt

2010-09-10 Thread Alexander Graf
On 10.09.2010, at 18:58, Thomas Monjalon wrote: > Alexander Graf wrote: >> Am 10.09.2010 um 18:08 schrieb "Edgar E. Iglesias" > : >>> On Fri, Sep 10, 2010 at 05:50:27PM +0200, Alexander Graf wrote: Thomas Monjalon wrote: > Alexander Graf wrote: >> Thomas Monjalon wrote: >>> Alex

Re: [Qemu-devel] [PATCH] target-ppc: clear MSR_POW on interrupt

2010-09-10 Thread Edgar E. Iglesias
On Fri, Sep 10, 2010 at 06:58:10PM +0200, Thomas Monjalon wrote: > Alexander Graf wrote: > > Am 10.09.2010 um 18:08 schrieb "Edgar E. Iglesias" > : > > > On Fri, Sep 10, 2010 at 05:50:27PM +0200, Alexander Graf wrote: > > >> Thomas Monjalon wrote: > > >>> Alexander Graf wrote: > > Thomas Monj

Re: [Qemu-devel] [PATCH] target-ppc: clear MSR_POW on interrupt

2010-09-10 Thread Thomas Monjalon
Alexander Graf wrote: > Am 10.09.2010 um 18:08 schrieb "Edgar E. Iglesias" : > > On Fri, Sep 10, 2010 at 05:50:27PM +0200, Alexander Graf wrote: > >> Thomas Monjalon wrote: > >>> Alexander Graf wrote: > Thomas Monjalon wrote: > > Alexander Graf wrote: > >> Thomas Monjalon wrote: > >>>

Re: [Qemu-devel] [PATCH] target-ppc: clear MSR_POW on interrupt

2010-09-10 Thread Alexander Graf
Am 10.09.2010 um 18:08 schrieb "Edgar E. Iglesias" : > On Fri, Sep 10, 2010 at 05:50:27PM +0200, Alexander Graf wrote: >> Thomas Monjalon wrote: >>> Alexander Graf wrote: >>> Thomas Monjalon wrote: > Alexander Graf wrote: > >> Thomas Monjalon wrote: >> >>> From:

Re: [Qemu-devel] [PATCH] target-ppc: clear MSR_POW on interrupt

2010-09-10 Thread Edgar E. Iglesias
On Fri, Sep 10, 2010 at 05:50:27PM +0200, Alexander Graf wrote: > Thomas Monjalon wrote: > > Alexander Graf wrote: > > > >> Thomas Monjalon wrote: > >> > >>> Alexander Graf wrote: > >>> > Thomas Monjalon wrote: > > > From: till <608...@bugs.launchpad.net> > >>>

Re: [Qemu-devel] [PATCH] target-ppc: clear MSR_POW on interrupt

2010-09-10 Thread Alexander Graf
Thomas Monjalon wrote: > Alexander Graf wrote: > >> Thomas Monjalon wrote: >> >>> Alexander Graf wrote: >>> Thomas Monjalon wrote: > From: till <608...@bugs.launchpad.net> > > According to FreeScale's 'Programming Environments Manual for 32-bit > Im

Re: [Qemu-devel] [PATCH] target-ppc: clear MSR_POW on interrupt

2010-09-10 Thread Thomas Monjalon
Alexander Graf wrote: > Thomas Monjalon wrote: > > Alexander Graf wrote: > >> Thomas Monjalon wrote: > >>> From: till <608...@bugs.launchpad.net> > >>> > >>> According to FreeScale's 'Programming Environments Manual for 32-bit > >>> Implementations of the PowerPC Architecture' [MPCFPE32B, Rev.3, >

Re: [Qemu-devel] [PATCH] target-ppc: clear MSR_POW on interrupt

2010-09-10 Thread Alexander Graf
Thomas Monjalon wrote: > Alexander Graf wrote: > >> Thomas Monjalon wrote: >> >>> From: till <608...@bugs.launchpad.net> >>> >>> According to FreeScale's 'Programming Environments Manual for 32-bit >>> Implementations of the PowerPC Architecture' [MPCFPE32B, Rev.3, 9/2005], >>> section 6.5,

Re: [Qemu-devel] [PATCH] target-ppc: clear MSR_POW on interrupt

2010-09-10 Thread Thomas Monjalon
Alexander Graf wrote: > Thomas Monjalon wrote: > > From: till <608...@bugs.launchpad.net> > > > > According to FreeScale's 'Programming Environments Manual for 32-bit > > Implementations of the PowerPC Architecture' [MPCFPE32B, Rev.3, 9/2005], > > section 6.5, table 6-7, an interrupt resets MSR_PO

Re: [Qemu-devel] [PATCH] target-ppc: clear MSR_POW on interrupt

2010-09-10 Thread Alexander Graf
Thomas Monjalon wrote: > From: till <608...@bugs.launchpad.net> > > According to FreeScale's 'Programming Environments Manual for 32-bit > Implementations of the PowerPC Architecture' [MPCFPE32B, Rev.3, 9/2005], > section 6.5, table 6-7, an interrupt resets MSR_POW to zero but qemu-0.12.4 > fails t

[Qemu-devel] [PATCH] target-ppc: clear MSR_POW on interrupt

2010-09-10 Thread Thomas Monjalon
From: till <608...@bugs.launchpad.net> According to FreeScale's 'Programming Environments Manual for 32-bit Implementations of the PowerPC Architecture' [MPCFPE32B, Rev.3, 9/2005], section 6.5, table 6-7, an interrupt resets MSR_POW to zero but qemu-0.12.4 fails to do so. Resetting the bit is nece