Re: [Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception

2016-03-31 Thread Thomas Huth
On 31.03.2016 11:03, Alexander Graf wrote: > On 03/31/2016 10:50 AM, Thomas Huth wrote: >> On 31.03.2016 09:15, Alexander Graf wrote: >>> On 31.03.16 09:06, Laurent Vivier wrote: On 31/03/2016 08:54, Alexander Graf wrote: > On 31.03.16 01:29, David Gibson wrote: >> On Wed, 30 Mar 2016

Re: [Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception

2016-03-31 Thread Alexander Graf
On 03/31/2016 10:50 AM, Thomas Huth wrote: On 31.03.2016 09:15, Alexander Graf wrote: On 31.03.16 09:06, Laurent Vivier wrote: On 31/03/2016 08:54, Alexander Graf wrote: On 31.03.16 01:29, David Gibson wrote: On Wed, 30 Mar 2016 19:13:00 +0200 Laurent Vivier wrote: If the processor is in l

Re: [Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception

2016-03-31 Thread Thomas Huth
On 31.03.2016 09:15, Alexander Graf wrote: > > On 31.03.16 09:06, Laurent Vivier wrote: >> >> On 31/03/2016 08:54, Alexander Graf wrote: >>> >>> On 31.03.16 01:29, David Gibson wrote: On Wed, 30 Mar 2016 19:13:00 +0200 Laurent Vivier wrote: > If the processor is in little-endia

Re: [Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception

2016-03-31 Thread Laurent Vivier
On 31/03/2016 09:15, Alexander Graf wrote: > > > On 31.03.16 09:06, Laurent Vivier wrote: >> >> >> On 31/03/2016 08:54, Alexander Graf wrote: >>> >>> >>> On 31.03.16 01:29, David Gibson wrote: On Wed, 30 Mar 2016 19:13:00 +0200 Laurent Vivier wrote: > If the processor is in

Re: [Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception

2016-03-31 Thread Alexander Graf
On 31.03.16 09:06, Laurent Vivier wrote: > > > On 31/03/2016 08:54, Alexander Graf wrote: >> >> >> On 31.03.16 01:29, David Gibson wrote: >>> On Wed, 30 Mar 2016 19:13:00 +0200 >>> Laurent Vivier wrote: >>> If the processor is in little-endian mode, an alignment interrupt must occur

Re: [Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception

2016-03-31 Thread Laurent Vivier
On 31/03/2016 08:54, Alexander Graf wrote: > > > On 31.03.16 01:29, David Gibson wrote: >> On Wed, 30 Mar 2016 19:13:00 +0200 >> Laurent Vivier wrote: >> >>> If the processor is in little-endian mode, an alignment interrupt must >>> occur for the following instructions: lmw, stmw, lswi, lswx,

Re: [Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception

2016-03-30 Thread Alexander Graf
On 31.03.16 01:29, David Gibson wrote: > On Wed, 30 Mar 2016 19:13:00 +0200 > Laurent Vivier wrote: > >> If the processor is in little-endian mode, an alignment interrupt must >> occur for the following instructions: lmw, stmw, lswi, lswx, stswi or stswx. >> >> This is what happens with KVM, so

Re: [Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception

2016-03-30 Thread Laurent Vivier
On 31/03/2016 01:29, David Gibson wrote: > On Wed, 30 Mar 2016 19:13:00 +0200 > Laurent Vivier wrote: > >> If the processor is in little-endian mode, an alignment interrupt must >> occur for the following instructions: lmw, stmw, lswi, lswx, stswi or stswx. >> >> This is what happens with KVM,

Re: [Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception

2016-03-30 Thread David Gibson
On Wed, 30 Mar 2016 19:13:00 +0200 Laurent Vivier wrote: > If the processor is in little-endian mode, an alignment interrupt must > occur for the following instructions: lmw, stmw, lswi, lswx, stswi or stswx. > > This is what happens with KVM, so change TCG to do the same. > > As the instructio

[Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception

2016-03-30 Thread Laurent Vivier
If the processor is in little-endian mode, an alignment interrupt must occur for the following instructions: lmw, stmw, lswi, lswx, stswi or stswx. This is what happens with KVM, so change TCG to do the same. As the instruction can be emulated by the kernel, enable the change only in softmmu mode