On 15/12/2014 18:07, Maciej W. Rozycki wrote:
> Great! I have now posted all the changes I had outstanding, there will
> be no more.
Thanks for the patches, they are very valuable - especially
IEEE 754-2008, it's a significant improvement for MIPS! I'll take a
closer look at the remaining ones,
On Fri, 12 Dec 2014, Leon Alrae wrote:
> > It would. This code isn't wrong though unlike our current version,
> > this is merely a pessimisation. An update will require a costly
> > regression test rerun and therefore I'll give the priority to the
> > outstanding changes I have before going
On 05/12/2014 18:55, Maciej W. Rozycki wrote:
> On Thu, 4 Dec 2014, Leon Alrae wrote:
>
>>> Index: qemu-git-trunk/target-mips/translate.c
>>> ===
>>> --- qemu-git-trunk.orig/target-mips/translate.c 2014-11-12
>>> 07:41:26.5975420
On Thu, 4 Dec 2014, Leon Alrae wrote:
> > Index: qemu-git-trunk/target-mips/translate.c
> > ===
> > --- qemu-git-trunk.orig/target-mips/translate.c 2014-11-12
> > 07:41:26.597542010 +
> > +++ qemu-git-trunk/target-mips/transl
On 19/11/2014 17:29, Maciej W. Rozycki wrote:
> qemu-mips32-addr.diff
> Index: qemu-git-trunk/target-mips/cpu.h
> ===
> --- qemu-git-trunk.orig/target-mips/cpu.h 2014-11-12 07:41:26.597542010
> +
> +++ qemu-git-trunk/target-mi
Make sure the address space is unconditionally wrapped on 32-bit
processors, that is ones that do not implement at least the MIPS III
ISA.
Also make MIPS16 SAVE and RESTORE instructions use address calculation
rather than plain arithmetic operations for stack pointer manipulation
so that their
