On Tue, Nov 17, 2015 at 12:41:47PM +0100, Richard Henderson wrote:
> The Intel specification clearly indicates that the low part
> of the result is written first and the high part of the result
> is written second; thus if ModRM:reg and VEX. are identical,
> the final result should be the high
The Intel specification clearly indicates that the low part
of the result is written first and the high part of the result
is written second; thus if ModRM:reg and VEX. are identical,
the final result should be the high part of the result.
At present, TCG may either produce incorrect results o
On 11/17/2015 04:40 AM, Max Reitz wrote:
-tcg_gen_mulu2_i64(cpu_regs[s->vex_v], cpu_regs[reg],
- cpu_T[0], cpu_regs[R_EDX]);
+tcg_gen_op3_i64(INDEX_op_mul_i64, cpu_regs[s->vex_v],
+cpu
Apparently in contrast to similar instructions on other architectures,
x86's mulx will store the lower half of the result first, and the upper
half later. If the same register is to be used for both, it will contain
the upper half of the result after the operation.
tcg_gen_mulu2_i64()'s default ca
