Thanks for the swift reply.
Michael's changes look very good indeed. Thank you for pointing them out.
No need to consider this any further then.
Cheers,
François.
On Tue, Nov 17, 2015 at 1:49 PM, Peter Maydell
wrote:
> On 17 November 2015 at 21:40, François Baldassari
> wrote:
> > On armv7m
On 17 November 2015 at 21:40, François Baldassari
wrote:
> On armv7m mcus, the BASEPRI register can be set to mask interrupts
> above a certain priority.
>
> This changeset implements that functionality by way of the NVIC which
> ultimately sets the interrupt mask in the GIC.
>
> Signed-off-by: Fr
On armv7m mcus, the BASEPRI register can be set to mask interrupts
above a certain priority.
This changeset implements that functionality by way of the NVIC which
ultimately sets the interrupt mask in the GIC.
Signed-off-by: François Baldassari
---
hw/intc/arm_gic.c | 2 +-
hw/intc/armv7m
