On Tue, Mar 01, 2011 at 05:35:19PM +, Peter Maydell wrote:
> Fix two bugs in the translation of the instructions VMOV sa,sb,rx,ry and
> VMOV rx,ry,sa,sb (which copy between a pair of ARM core registers and a
> pair of VFP single precision registers):
>
> * An incorrect condition meant these i
Fix two bugs in the translation of the instructions VMOV sa,sb,rx,ry and
VMOV rx,ry,sa,sb (which copy between a pair of ARM core registers and a
pair of VFP single precision registers):
* An incorrect condition meant these instruction patterns were being
treated as load/store multiple, which r
