Re: [Qemu-devel] [PATCH] sparc32: fix per cpu counter/timer

2008-01-05 Thread Robert Reif
This patch is trying to make qemu behave like real hardware. This is what the OSs expect. The ability to create hardware that never existed and can't exist due to real hardware limitations is cool but it's not going to work properly with existing OSs. At best you will have the OS never acces

Re: [Qemu-devel] [PATCH] sparc32: fix per cpu counter/timer

2008-01-05 Thread Blue Swirl
On 1/5/08, Robert Reif <[EMAIL PROTECTED]> wrote: > Sun4m SMP machines support a maximum of 4 CPUs. Linux > knows this and uses fixed size arrays for per-cpu counter/timers > and interrupt controllers. Sun4m uni-processor machines use > the slaveio chip which has a single per-cpu counter/timer >

[Qemu-devel] [PATCH] sparc32: fix per cpu counter/timer

2008-01-04 Thread Robert Reif
Sun4m SMP machines support a maximum of 4 CPUs. Linux knows this and uses fixed size arrays for per-cpu counter/timers and interrupt controllers. Sun4m uni-processor machines use the slaveio chip which has a single per-cpu counter/timer and interrupt controller. However it does not fully decode