On Wed, Sep 21, 2016 at 12:59:58PM +0200, Michael Walle wrote:
> Am 2016-08-16 15:56, schrieb Michael Walle:
> >Am 2016-08-16 15:41, schrieb Riku Voipio:
> >>On Tue, Aug 16, 2016 at 03:32:56PM +0200, Michael Walle wrote:
> >>>Am 2016-07-22 17:57, schrieb Alexander Graf:
> On 07/22/2016 05:18 PM
Am 2016-08-16 15:56, schrieb Michael Walle:
Am 2016-08-16 15:41, schrieb Riku Voipio:
On Tue, Aug 16, 2016 at 03:32:56PM +0200, Michael Walle wrote:
Am 2016-07-22 17:57, schrieb Alexander Graf:
>On 07/22/2016 05:18 PM, Michael Walle wrote:
>>64 bit user mode doesn't work for the e5500 core beca
Am 2016-08-16 15:41, schrieb Riku Voipio:
On Tue, Aug 16, 2016 at 03:32:56PM +0200, Michael Walle wrote:
Am 2016-07-22 17:57, schrieb Alexander Graf:
>On 07/22/2016 05:18 PM, Michael Walle wrote:
>>64 bit user mode doesn't work for the e5500 core because the MSR_CM bit
>>is
>>not set which enabl
On Tue, Aug 16, 2016 at 03:32:56PM +0200, Michael Walle wrote:
> Am 2016-07-22 17:57, schrieb Alexander Graf:
> >On 07/22/2016 05:18 PM, Michael Walle wrote:
> >>64 bit user mode doesn't work for the e5500 core because the MSR_CM bit
> >>is
> >>not set which enables the 64 bit mode for this MMU mod
Am 2016-07-22 17:57, schrieb Alexander Graf:
On 07/22/2016 05:18 PM, Michael Walle wrote:
64 bit user mode doesn't work for the e5500 core because the MSR_CM
bit is
not set which enables the 64 bit mode for this MMU model. Memory
addresses
are truncated to 32 bit, which results in "Invalid dat
On 07/22/2016 05:18 PM, Michael Walle wrote:
64 bit user mode doesn't work for the e5500 core because the MSR_CM bit is
not set which enables the 64 bit mode for this MMU model. Memory addresses
are truncated to 32 bit, which results in "Invalid data memory access"
error messages. Fix it by setti
64 bit user mode doesn't work for the e5500 core because the MSR_CM bit is
not set which enables the 64 bit mode for this MMU model. Memory addresses
are truncated to 32 bit, which results in "Invalid data memory access"
error messages. Fix it by setting the MSR_CM bit for this MMU model.
Signed-o