Blue Swirl wrote:
> On 5/9/07, Thiemo Seufer <[EMAIL PROTECTED]> wrote:
> >Hello All,
> >
> >The relevant IEEE standards don't define if a set or a clear bit is
> >used to distinguish between QNaN and SNaN. MIPS, and apparently
> >PA RISC, made a different choice than the rest of the industry.
>
>
On 5/9/07, Thiemo Seufer <[EMAIL PROTECTED]> wrote:
Hello All,
The relevant IEEE standards don't define if a set or a clear bit is
used to distinguish between QNaN and SNaN. MIPS, and apparently
PA RISC, made a different choice than the rest of the industry.
On Sparc, the rule is as follows:
Hello All,
The relevant IEEE standards don't define if a set or a clear bit is
used to distinguish between QNaN and SNaN. MIPS, and apparently
PA RISC, made a different choice than the rest of the industry.
The appended patch accounts for this, it fixes a number of failures
on MIPS, none of those
