Re: [Qemu-devel] [PATCH, MIPS64] Fix Status_rw_bitmask values

2007-06-08 Thread Thiemo Seufer
Aurelien Jarno wrote: [snip] > >> - 64-bit is implemented, the PX bit should be writable. > > > > The current version is correct, R4000 and 5K don't implement PX, the > > 20Kc and later CPUs do. > > I don't know about R4000, but the 5K manual (from www.mips.com) clearly > says that this bit is im

Re: [Qemu-devel] [PATCH, MIPS64] Fix Status_rw_bitmask values

2007-06-08 Thread Aurelien Jarno
Thiemo Seufer a écrit : > Aurelien Jarno wrote: >> Hi all, >> >> The patch below fixes the Status_rw_bitmask values for 64-bit CPUs: >> - Reverse endianess is currently not implemented, the RE bit should >> not be writable. > > OTOH, those CPUs support RE, that's why I left the bit writable. >

Re: [Qemu-devel] [PATCH, MIPS64] Fix Status_rw_bitmask values

2007-06-05 Thread Thiemo Seufer
Aurelien Jarno wrote: > Hi all, > > The patch below fixes the Status_rw_bitmask values for 64-bit CPUs: > - Reverse endianess is currently not implemented, the RE bit should > not be writable. OTOH, those CPUs support RE, that's why I left the bit writable. I think you'll have to boot RiscOS t

[Qemu-devel] [PATCH, MIPS64] Fix Status_rw_bitmask values

2007-06-04 Thread Aurelien Jarno
Hi all, The patch below fixes the Status_rw_bitmask values for 64-bit CPUs: - Reverse endianess is currently not implemented, the RE bit should not be writable. - 64-bit is implemented, the PX bit should be writable. Bye, Aurelien Index: target-mips/translate_init.c ==