** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
Possibly wrong GICv3 behavior when secure enabled
Status in QEMU:
Fi
Now fixed in master in commit a2e2d7fc46fd8be, so will be in 2.12.0.
** Changed in: qemu
Status: In Progress => Fix Committed
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Title:
P
Patch which should fix this:
https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg04537.html
** Changed in: qemu
Status: New => In Progress
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Whoops, yes, we have the wrong condition for ICC_PMR non-secure reads
and writes. We also have the same bug in ICC_RPR reads. I'll put
together a patch and send it to the mailing list.
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h
** Tags added: arm
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https://bugs.launchpad.net/bugs/1748434
Title:
Possibly wrong GICv3 behavior when secure enabled
Status in QEMU:
New
Bug description:
I an tried arm-aarch64 i
see possible solution, in #if 0 is original code in #else see possible
fix
static uint64_t icc_pmr_read(CPUARMState *env, const ARMCPRegInfo *ri)
#if 0 // KIURCHER: bug - shall be opposite; see ARM specification
if (value & 0x80) {
/* Secure priorities not visible to NS */
