Thanks a lot for your help! It is not a Qemu problem.
I ported the code from a pre ARMv7 environment. In the assembler code I
have this:
msr spsr, r5
The GNU as translates this to:
msr SPSR_fc, r5
Correct is this:
msr SPSR_fsxc, r5
I fixed the assembler source and now all SPSR fields
I did a bit of digging, and the reason that QEMU is not taking the
branch is that when control returns from the exception handler the CPSR
ITSTATE fields are non-zero. This means that the branch instruction is
UNPREDICTABLE (and therefore falling through is architecturally valid
behaviour for QEMU
If I use this idle thread
volatile int sdlkfj = 0;
void *_CPU_Thread_Idle_body( uintptr_t ignored )
{
while ( true ) {
while ( sdlkfj == 0 ) {
__asm__ volatile ("wfi; nop; nop; nop");
}
__asm__ volatile ("wfi; nop; nop; nop");
}
}
then the test program seems to run forev
If I replace the idle thread with this code
void *_CPU_Thread_Idle_body( uintptr_t ignored )
{
while ( true ) {
__asm__ volatile ("wfi");
}
}
void foobarblub(void)
{
__asm__ volatile ("nop; nop; nop; nop; nop");
bsp_reset();
}
then I get also an invalid execution sequence:
0x0001
** Attachment added: "ELF file of the application."
https://bugs.launchpad.net/qemu/+bug/1182344/+attachment/3682743/+files/app.exe
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https://bugs.launchpad.net/bugs/1182344
Title:
Can you attach or provide a link to your app.exe test case? Otherwise
this is going to be harder to track down and test. Thanks!
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https://bugs.launchpad.net/bugs/1182344
Title:
ARM: in
