Re: [Qemu-devel][PATCH] Fix initial value for MIPS CP0 Config Register

2006-05-20 Thread Stefan Weil
Hi, there is one more small problem with the MIPS CP0 config register: QEMU always sets CP0C0_BE (big endian mode). It shouldn't be set for qemu-system-mipsel. Regards Stefan ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.or

[Qemu-devel][PATCH] Fix initial value for MIPS CP0 Config Register

2006-05-19 Thread Stefan Weil
Hi, this patch fixes several bugs in mips-defs.h: * Using enum for MIPS_R4Kc, MIPS_R4Kp does not work as expected, because the C preprocessor does not know these values. It will always use the branch for MIPS_R4Kc - independent of MIPS_CPU. * More important is the value of the CP0 config reg