subject:"\[PATCH v8 1\/2\] target\/riscv\: Add RISC\-V CSR qtest support"

Re: [PATCH v8 1/2] target/riscv: Add RISC-V CSR qtest support

2025-01-05 Thread Alistair Francis

On Wed, Dec 25, 2024 at 10:38 PM Ivan Klokov wrote: > > The RISC-V architecture supports the creation of custom > CSR-mapped devices. It would be convenient to test them in the same way > as MMIO-mapped devices. To do this, a new call has been added > to read/write CSR registers. > > Signed-off-by

[PATCH v8 1/2] target/riscv: Add RISC-V CSR qtest support

2024-12-25 Thread Ivan Klokov

The RISC-V architecture supports the creation of custom CSR-mapped devices. It would be convenient to test them in the same way as MMIO-mapped devices. To do this, a new call has been added to read/write CSR registers. Signed-off-by: Ivan Klokov Acked-by: Fabiano Rosas Reviewed-by: Daniel Henriq