On Sat, Feb 24, 2024 at 8:55 PM Inès Varhol
wrote:
>
> Features supported :
> - the 8 STM32L4x5 GPIOs are initialized with their reset values
> (except IDR, see below)
> - input mode : setting a pin in input mode "externally" (using input
> irqs) results in an out irq (transmitted to SYSCF
Features supported :
- the 8 STM32L4x5 GPIOs are initialized with their reset values
(except IDR, see below)
- input mode : setting a pin in input mode "externally" (using input
irqs) results in an out irq (transmitted to SYSCFG)
- output mode : setting a bit in ODR sets the corresponding o
