Re: [PATCH v6 0/6] RISC-V Pointer Masking implementation

2020-10-26 Thread Richard Henderson
On 10/23/20 5:25 PM, Alistair Francis wrote: > On Thu, Oct 22, 2020 at 1:04 AM Alexey Baturo wrote: >> >> Hi, >> >> Added missing sign-off on the first patch. >> >> Thanks >> >> Alexey Baturo (5): >> [RISCV_PM] Add J-extension into RISC-V >> [RISCV_PM] Support CSRs required for RISC-V PM exten

Re: [PATCH v6 0/6] RISC-V Pointer Masking implementation

2020-10-23 Thread Alistair Francis
On Thu, Oct 22, 2020 at 1:04 AM Alexey Baturo wrote: > > Hi, > > Added missing sign-off on the first patch. > > Thanks > > Alexey Baturo (5): > [RISCV_PM] Add J-extension into RISC-V > [RISCV_PM] Support CSRs required for RISC-V PM extension except for > ones in hypervisor mode > [RISCV_

[PATCH v6 0/6] RISC-V Pointer Masking implementation

2020-10-22 Thread Alexey Baturo
Hi, Added missing sign-off on the first patch. Thanks Alexey Baturo (5): [RISCV_PM] Add J-extension into RISC-V [RISCV_PM] Support CSRs required for RISC-V PM extension except for ones in hypervisor mode [RISCV_PM] Print new PM CSRs in QEMU logs [RISCV_PM] Support pointer masking for