Re: [PATCH v5 28/30] tcg/riscv: Simplify constraints on qemu_ld/st

2023-05-10 Thread Alex Bennée
Richard Henderson writes: > The softmmu tlb uses TCG_REG_TMP[0-2], not any of the normally available > registers. Now that we handle overlap betwen inputs and helper arguments, > we can allow any allocatable reg. > > Reviewed-by: Daniel Henrique Barboza > Signed-off-by: Richard Henderson Re

[PATCH v5 28/30] tcg/riscv: Simplify constraints on qemu_ld/st

2023-05-06 Thread Richard Henderson
The softmmu tlb uses TCG_REG_TMP[0-2], not any of the normally available registers. Now that we handle overlap betwen inputs and helper arguments, we can allow any allocatable reg. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target-con-set.h | 2 --