On 15. 7. 25. 12:04, Philippe Mathieu-Daudé wrote:
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> Hi,
Hi Philippe,
Thanks for the comments!
>
> On 3/7/25 12:49,
Hi,
On 3/7/25 12:49, Djordje Todorovic wrote:
Add RISC-V implementations of the Coherent Manager Global Control
Register (CMGCR) and Cluster Power Controller (CPC) devices. These
are based on the existing MIPS CMGCR and CPC implementations but
adapted for RISC-V systems.
The CMGCR device provid
On 7/3/25 7:49 AM, Djordje Todorovic wrote:
Add RISC-V implementations of the Coherent Manager Global Control
Register (CMGCR) and Cluster Power Controller (CPC) devices. These
are based on the existing MIPS CMGCR and CPC implementations but
adapted for RISC-V systems.
The CMGCR device provid
Add RISC-V implementations of the Coherent Manager Global Control
Register (CMGCR) and Cluster Power Controller (CPC) devices. These
are based on the existing MIPS CMGCR and CPC implementations but
adapted for RISC-V systems.
The CMGCR device provides global system control for multi-core
configura