Re: [PATCH v5 06/18] target/riscv: array for the 64 upper bits of 128-bit registers

2021-11-23 Thread Alistair Francis
On Tue, Nov 23, 2021 at 8:58 PM Frédéric Pétrot wrote: > > On 23/11/2021 07:09, Alistair Francis wrote: > > On Sat, Nov 13, 2021 at 1:07 AM Frédéric Pétrot > > wrote: > >> +static bool rv128_needed(void *opaque) > >> +{ > >> +RISCVCPU *cpu = opaque; > >> +CPURISCVState *env = &cpu->env; >

Re: [PATCH v5 06/18] target/riscv: array for the 64 upper bits of 128-bit registers

2021-11-23 Thread Frédéric Pétrot
On 23/11/2021 07:09, Alistair Francis wrote: On Sat, Nov 13, 2021 at 1:07 AM Frédéric Pétrot wrote: +static bool rv128_needed(void *opaque) +{ +RISCVCPU *cpu = opaque; +CPURISCVState *env = &cpu->env; + +return env->misa_mxl_max == MXL_RV128; +} I think it would just be better to

Re: [PATCH v5 06/18] target/riscv: array for the 64 upper bits of 128-bit registers

2021-11-22 Thread Alistair Francis
On Sat, Nov 13, 2021 at 1:07 AM Frédéric Pétrot wrote: > > The upper 64-bit of the 128-bit registers have now a place inside > the cpu state structure, and are created as globals for future use. > > Signed-off-by: Frédéric Pétrot > Co-authored-by: Fabien Portas > --- > target/riscv/cpu.h

[PATCH v5 06/18] target/riscv: array for the 64 upper bits of 128-bit registers

2021-11-12 Thread Frédéric Pétrot
The upper 64-bit of the 128-bit registers have now a place inside the cpu state structure, and are created as globals for future use. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas --- target/riscv/cpu.h | 2 ++ target/riscv/cpu.c | 9 + target/riscv/machine.