On Wed, Feb 26, 2020 at 3:40 PM Jim Wilson wrote:
>
> On Wed, Feb 26, 2020 at 2:36 PM Alistair Francis wrote:
> > On Wed, Feb 26, 2020 at 12:09 PM Jim Wilson wrote:
> > > If this rvv 0.7.1 implementation is considered a temporary solution,
> > > maybe we can just remove all of this work when the
On Wed, Feb 26, 2020 at 2:36 PM Alistair Francis wrote:
> On Wed, Feb 26, 2020 at 12:09 PM Jim Wilson wrote:
> > If this rvv 0.7.1 implementation is considered a temporary solution,
> > maybe we can just remove all of this work when the official rvv spec if
> > available? But presumably it is be
On Wed, Feb 26, 2020 at 12:09 PM Jim Wilson wrote:
>
> On 2/21/20 1:45 AM, LIU Zhiwei wrote:
> > This is the first part of v5 patchset. The changelog of v5 is only coverd
> > the part1.
> >
> > Features:
> >* support specification riscv-v-spec-0.7.1.
>
> I'm still concerned about versioning is
On 2/21/20 1:45 AM, LIU Zhiwei wrote:
This is the first part of v5 patchset. The changelog of v5 is only coverd
the part1.
Features:
* support specification riscv-v-spec-0.7.1.
I'm still concerned about versioning issues. This implements an
unofficial draft of the proposed RISC-V vector e
This is the first part of v5 patchset. The changelog of v5 is only coverd
the part1.
Features:
* support specification riscv-v-spec-0.7.1.
* support basic vector extension.
* support Zvlsseg.
* support Zvamo.
* not support Zvediv as it is changing.
* SLEN always equals VLEN.
* elemen