On Sun, Jan 16, 2022 at 8:31 AM Weiwei Li wrote:
>
> - add PTE_N bit
> - add PTE_N bit check for inner PTE
> - update address translation to support 64KiB continuous region (napot_bits =
> 4)
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
Looks good to me.
Reviewed-by: Anup Patel
- add PTE_N bit
- add PTE_N bit check for inner PTE
- update address translation to support 64KiB continuous region (napot_bits = 4)
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu.c| 2 ++
target/riscv/cpu.h| 1 +
target/riscv/cpu_bits.h | 1 +
t
