Re: [PATCH v4 1/7] target/riscv: Add initial support for the Sdtrig extension

On Tue, Mar 15, 2022 at 5:20 PM Bin Meng wrote: > > From: Bin Meng > > This adds initial support for the Sdtrig extension via the Trigger > Module, as defined in the RISC-V Debug Specification [1]. > > Only "Address / Data Match" trigger (type 2) is implemented as of now, > which is mainly used f

[PATCH v4 1/7] target/riscv: Add initial support for the Sdtrig extension

From: Bin Meng This adds initial support for the Sdtrig extension via the Trigger Module, as defined in the RISC-V Debug Specification [1]. Only "Address / Data Match" trigger (type 2) is implemented as of now, which is mainly used for hardware breakpoint and watchpoint. The number of type 2 tri