Re: [PATCH v4 06/11] target/riscv: Add mips.pref instruction

2025-06-30 Thread Daniel Henrique Barboza
On 6/25/25 11:18 AM, Djordje Todorovic wrote: Add MIPS P8700 prefetch instruction defined by Xmipscbop. Signed-off-by: Chao-ying Fu Signed-off-by: Djordje Todorovic --- Reviewed-by: Daniel Henrique Barboza target/riscv/cpu.c| 3 +++ target/riscv/cpu_cfg.h

[PATCH v4 06/11] target/riscv: Add mips.pref instruction

2025-06-25 Thread Djordje Todorovic
Add MIPS P8700 prefetch instruction defined by Xmipscbop. Signed-off-by: Chao-ying Fu Signed-off-by: Djordje Todorovic --- target/riscv/cpu.c| 3 +++ target/riscv/cpu_cfg.h| 3 ++- target/riscv/cpu_cfg_fields.h.inc | 1 + target/riscv/insn_