Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-03-14 Thread Daniel P . Berrangé
On Thu, Mar 14, 2024 at 09:26:53AM +0100, Anthony Harivel wrote: > > Hi Daniel, > > > > You don't need to access it via the /node/ hierarchy > > > > The canonical path for CPUs would be > > > > /sys/devices/system/cpu/cpuNNN/topology > > > > The core_cpus_list file is giving you hyper-thread s

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-03-14 Thread Anthony Harivel
Hi Daniel, > You don't need to access it via the /node/ hierarchy > > The canonical path for CPUs would be > > /sys/devices/system/cpu/cpuNNN/topology > > The core_cpus_list file is giving you hyper-thread siblings within > a core, which I don't think is what you want. > > If you're after dis

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-03-13 Thread Daniel P . Berrangé
On Wed, Mar 13, 2024 at 11:48:19AM +0100, Anthony Harivel wrote: > Hi Daniel, > > Daniel P. Berrangé, Mar 12, 2024 at 16:49: > > > The point still stands though. NUMA node ID numbers are not > > guaranteed to be the same as socket ID numbers. Very often > > then will be the same (which makes it a

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-03-13 Thread Anthony Harivel
Hi Daniel, Daniel P. Berrangé, Mar 12, 2024 at 16:49: > The point still stands though. NUMA node ID numbers are not > guaranteed to be the same as socket ID numbers. Very often > then will be the same (which makes it annoying to test as it > is easy to not realize the difference), but we can't re

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-03-12 Thread Daniel P . Berrangé
On Tue, Mar 12, 2024 at 12:21:14PM +0100, Anthony Harivel wrote: > Daniel P. Berrangé, Jan 30, 2024 at 10:39: > > > +rcu_register_thread(); > > > + > > > +/* Get QEMU PID*/ > > > +pid = getpid(); > > > + > > > +/* Nb of CPUS per packages */ > > > +maxcpus = vmsr_get_maxcpus(0);

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-03-12 Thread Anthony Harivel
Hi Daniel, Paolo, Here my last questions before wrapping up and send v4, or maybe call off my attempt to add RAPL interface in QEMU. Daniel P. Berrangé, Jan 30, 2024 at 10:39: > > +rcu_register_thread(); > > + > > +/* Get QEMU PID*/ > > +pid = getpid(); > > + > > +/* Nb of CPUS

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-03-05 Thread Anthony Harivel
Hi Daniel, > > + > > +/* Retrieve all packages power plane energy counter */ > > +for (int i = 0; i <= maxpkgs; i++) { > > +for (int j = 0; j < num_threads; j++) { > > +/* > > + * Use the first thread we found that ran on the CPU > > +

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-03-05 Thread Daniel P . Berrangé
On Tue, Mar 05, 2024 at 02:25:09PM +0100, Anthony Harivel wrote: > Daniel P. Berrangé, Mar 04, 2024 at 15:48: > > On Mon, Mar 04, 2024 at 03:41:02PM +0100, Anthony Harivel wrote: > > > > > > Hi Daniel, > > > > > > > > +if (s->msr_energy.enable == true) { > > > > > > > > This looks to be w

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-03-05 Thread Anthony Harivel
Daniel P. Berrangé, Mar 04, 2024 at 15:48: > On Mon, Mar 04, 2024 at 03:41:02PM +0100, Anthony Harivel wrote: > > > > Hi Daniel, > > > > > > +if (s->msr_energy.enable == true) { > > > > > > This looks to be where we need to check that both the host CPU > > > vendor is intel, and the guest

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-03-04 Thread Daniel P . Berrangé
On Mon, Mar 04, 2024 at 03:41:02PM +0100, Anthony Harivel wrote: > > Hi Daniel, > > > > +if (s->msr_energy.enable == true) { > > > > This looks to be where we need to check that both the host CPU > > vendor is intel, and the guest CPU vendor is intel, and that > > the host CPU has the RAP

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-03-04 Thread Anthony Harivel
Hi Daniel, > > +if (s->msr_energy.enable == true) { > > This looks to be where we need to check that both the host CPU > vendor is intel, and the guest CPU vendor is intel, and that > the host CPU has the RAPL feature we're using. > > With regards, > Daniel > -- > |: https://berrange.co

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-02-20 Thread Daniel P . Berrangé
On Tue, Feb 20, 2024 at 03:00:56PM +0100, Anthony Harivel wrote: > Daniel P. Berrangé, Jan 29, 2024 at 20:29: > > On Thu, Jan 25, 2024 at 08:22:14AM +0100, Anthony Harivel wrote: > > > diff --git a/docs/specs/rapl-msr.rst b/docs/specs/rapl-msr.rst > > > new file mode 100644 > > > index

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-02-20 Thread Anthony Harivel
Daniel P. Berrangé, Jan 29, 2024 at 20:29: > On Thu, Jan 25, 2024 at 08:22:14AM +0100, Anthony Harivel wrote: > > diff --git a/docs/specs/rapl-msr.rst b/docs/specs/rapl-msr.rst > > new file mode 100644 > > index ..04d27c198fc0 > > --- /dev/null > > +++ b/docs/specs/rapl-msr.rst > > @@ -

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-01-30 Thread Daniel P . Berrangé
On Thu, Jan 25, 2024 at 08:22:14AM +0100, Anthony Harivel wrote: > Starting with the "Sandy Bridge" generation, Intel CPUs provide a RAPL > interface (Running Average Power Limit) for advertising the accumulated > energy consumption of various power domains (e.g. CPU packages, DRAM, > etc.). > > T

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-01-30 Thread Daniel P . Berrangé
On Thu, Jan 25, 2024 at 08:22:14AM +0100, Anthony Harivel wrote: > Starting with the "Sandy Bridge" generation, Intel CPUs provide a RAPL > interface (Running Average Power Limit) for advertising the accumulated > energy consumption of various power domains (e.g. CPU packages, DRAM, > etc.). > > T

Re: [PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-01-29 Thread Daniel P . Berrangé
On Thu, Jan 25, 2024 at 08:22:14AM +0100, Anthony Harivel wrote: > diff --git a/docs/specs/rapl-msr.rst b/docs/specs/rapl-msr.rst > new file mode 100644 > index ..04d27c198fc0 > --- /dev/null > +++ b/docs/specs/rapl-msr.rst > @@ -0,0 +1,133 @@ > + > +RAPL MSR support > +

[PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-01-24 Thread Anthony Harivel
Starting with the "Sandy Bridge" generation, Intel CPUs provide a RAPL interface (Running Average Power Limit) for advertising the accumulated energy consumption of various power domains (e.g. CPU packages, DRAM, etc.). The consumption is reported via MSRs (model specific registers) like MSR_PKG_E