Re: [PATCH v3 12/20] target/riscv: implement zicfiss instructions

2024-08-07 Thread Deepak Gupta
On Wed, Aug 07, 2024 at 12:56:46PM +1000, Richard Henderson wrote: On 8/7/24 12:39, Richard Henderson wrote: +static bool trans_sspopchk(DisasContext *ctx, arg_sspopchk *a) +{ +    /* default for qemu-user, use regular RW memory and thus mmu_idx=0 */ +    int ss_mmu_idx = 0; This can't be righ

Re: [PATCH v3 12/20] target/riscv: implement zicfiss instructions

2024-08-07 Thread Deepak Gupta
On Wed, Aug 07, 2024 at 12:39:15PM +1000, Richard Henderson wrote: On 8/7/24 10:06, Deepak Gupta wrote: zicfiss has following instructions - sspopchk: pops a value from shadow stack and compares with x1/x5. If they dont match, reports a sw check exception with tval = 3. - sspush: pushes val

Re: [PATCH v3 12/20] target/riscv: implement zicfiss instructions

2024-08-06 Thread Richard Henderson
On 8/7/24 12:39, Richard Henderson wrote: +static bool trans_sspopchk(DisasContext *ctx, arg_sspopchk *a) +{ +    /* default for qemu-user, use regular RW memory and thus mmu_idx=0 */ +    int ss_mmu_idx = 0; This can't be right, since 0 is M_MODE. I'm wrong about m-mode here, but "0" is cert

Re: [PATCH v3 12/20] target/riscv: implement zicfiss instructions

2024-08-06 Thread Richard Henderson
On 8/7/24 10:06, Deepak Gupta wrote: zicfiss has following instructions - sspopchk: pops a value from shadow stack and compares with x1/x5. If they dont match, reports a sw check exception with tval = 3. - sspush: pushes value in x1/x5 on shadow stack - ssrdp: reads current shadow stack

[PATCH v3 12/20] target/riscv: implement zicfiss instructions

2024-08-06 Thread Deepak Gupta
zicfiss has following instructions - sspopchk: pops a value from shadow stack and compares with x1/x5. If they dont match, reports a sw check exception with tval = 3. - sspush: pushes value in x1/x5 on shadow stack - ssrdp: reads current shadow stack - ssamoswap: swaps contents of shadow sta