Re: [PATCH v2 8/9] async: update documentation of the memory barriers

2023-03-08 Thread Richard Henderson
On 3/8/23 10:08, Paolo Bonzini wrote: On 3/8/23 17:47, Richard Henderson wrote: The case that I was imagining for smp_mb__before_rmw() is something like this:  wake_me = true;  smp_mb__before_rmw();  if (qatomic_xchg(&can_sleep, true)) { ... } where you really need a full barrier.

Re: [PATCH v2 8/9] async: update documentation of the memory barriers

2023-03-08 Thread Paolo Bonzini
On 3/8/23 17:47, Richard Henderson wrote: The case that I was imagining for smp_mb__before_rmw() is something like this:  wake_me = true;  smp_mb__before_rmw();  if (qatomic_xchg(&can_sleep, true)) { ... } where you really need a full barrier. What is different about this that do

Re: [PATCH v2 8/9] async: update documentation of the memory barriers

2023-03-08 Thread Richard Henderson
On 3/8/23 02:49, Paolo Bonzini wrote: On 3/7/23 18:26, Richard Henderson wrote: On 3/7/23 09:00, Paolo Bonzini wrote: while QSLIST_REMOVE_HEAD in the dequeuing thread is not ordered at all: y.store(0, mo_relaxed);   // QSLIST_REMOVE_HEAD x.store(0, mo_release);   

Re: [PATCH v2 8/9] async: update documentation of the memory barriers

2023-03-08 Thread Paolo Bonzini
On 3/7/23 18:26, Richard Henderson wrote: On 3/7/23 09:00, Paolo Bonzini wrote: while QSLIST_REMOVE_HEAD in the dequeuing thread is not ordered at all: y.store(0, mo_relaxed);   // QSLIST_REMOVE_HEAD x.store(0, mo_release);   // fetch_and As I read aio_bh_queu

Re: [PATCH v2 8/9] async: update documentation of the memory barriers

2023-03-07 Thread Richard Henderson
On 3/7/23 09:00, Paolo Bonzini wrote: while QSLIST_REMOVE_HEAD in the dequeuing thread is not ordered at all:     y.store(0, mo_relaxed);   // QSLIST_REMOVE_HEAD     x.store(0, mo_release);   // fetch_and As I read aio_bh_queue, this is exactly the situation you descri

Re: [PATCH v2 8/9] async: update documentation of the memory barriers

2023-03-07 Thread Paolo Bonzini
On 3/7/23 16:54, Richard Henderson wrote: Just to be safe, I tried modeling this with cppmem (http://svr-pes20-cppmem.cl.cam.ac.uk/cppmem/); support for compare-and-swap is very limited, therefore the test looks nothing like the C code(*), but it should be ok: You do realize that QSLIST_REM

Re: [PATCH v2 8/9] async: update documentation of the memory barriers

2023-03-07 Thread Richard Henderson
On 3/7/23 02:49, Paolo Bonzini wrote: On 3/7/23 00:39, Richard Henderson wrote: On 3/6/23 14:33, Paolo Bonzini wrote: @@ -107,11 +114,8 @@ static QEMUBH *aio_bh_dequeue(BHList *head, unsigned *flags)   QSLIST_REMOVE_HEAD(head, next);   /* - * The qatomic_and is paired with aio_bh_e

Re: [PATCH v2 8/9] async: update documentation of the memory barriers

2023-03-07 Thread Paolo Bonzini
On 3/7/23 00:39, Richard Henderson wrote: On 3/6/23 14:33, Paolo Bonzini wrote: @@ -107,11 +114,8 @@ static QEMUBH *aio_bh_dequeue(BHList *head, unsigned *flags)   QSLIST_REMOVE_HEAD(head, next);   /* - * The qatomic_and is paired with aio_bh_enqueue().  The implicit memory - *

Re: [PATCH v2 8/9] async: update documentation of the memory barriers

2023-03-06 Thread Richard Henderson
On 3/6/23 14:33, Paolo Bonzini wrote: @@ -107,11 +114,8 @@ static QEMUBH *aio_bh_dequeue(BHList *head, unsigned *flags) QSLIST_REMOVE_HEAD(head, next); /* - * The qatomic_and is paired with aio_bh_enqueue(). The implicit memory - * barrier ensures that the callback sees

Re: [PATCH v2 8/9] async: update documentation of the memory barriers

2023-03-06 Thread Stefan Hajnoczi
Reviewed-by: Stefan Hajnoczi

[PATCH v2 8/9] async: update documentation of the memory barriers

2023-03-06 Thread Paolo Bonzini
Ever since commit 8c6b0356b539 ("util/async: make bh_aio_poll() O(1)", 2020-02-22), synchronization between qemu_bh_schedule() and aio_bh_poll() is happening when the bottom half is enqueued in the bh_list; not when the flags are set. Update the documentation to match. Signed-off-by: Paolo Bonzin